HeM3D

Heterogeneous manycore architectures are the key to efficiently execute compute- and data-intensive applications. Through silicon via (TSV)-based 3D system is a promising solution in this direction as it enables integration of disparate computing cores on single system. However, achievable performance conventional through-silicon-via systems ultimately bottlenecked by horizontal wires (wires each planar die). Moreover, current TSV suffer from thermal limitations. Hence, TSV-based do not realize full potential integration. Monolithic (M3D) integration, breakthrough technology achieve - More Moore Than opens up possibility designing associated network routers using multiple layers utilizing monolithic inter-tier vias (MIVs) hence, reducing effective wire length. Compared ICs, M3D offers true benefits vertical dimension for integration: size MIV used over 100x smaller than TSV. In work, we demonstrate how M3D-enabled core uncore elements offer significant improvements heterogeneous compared its counterpart. To overcome difficult optimization challenges due large design space complex interactions among components (CPU, GPU, Last Level Cache, etc.) an M3D-based chip, leverage novel design-space exploration algorithms trade-off different objectives. The proposed architecture, called HeM3D, outperforms state-of-the-art TSV-equivalent counterpart 18.3% execution time while being 19 degrees Celcius cooler.